The present invention relates to a manufacturing method for a semiconductor storage device, and in particular, relates to a suitable method for the manufacture of a mask ROM.
There is a mask ROM to which data are written by implanting impurity ions to the channel area of a memory cell transistor after it is formed. A patterned symbol is generally denoted on the surface of a semiconductor chip so that it is possible to confirm the written data.
FIG. 2 shows a plan view of such a semiconductor. In an area 15 except a memory cell array area 12, peripheral circuit areas 13 and 14 on a semiconductor chip 11 as shown in FIG. 2, a ROM data pattern is formed, and what kind of data are written on a chip 11 can be recognized by simply observing the surface of the semiconductor chip 11.
The manufacture of such a semiconductor storage device has been performed as described in the following. In FIG. 3, there are shown sectional views of elements by manufacturing processes. On the surface of a semiconductor substrate 21, a gate oxide film 22 and a gate electrode 23 are formed, and an oxide film 24 of about 200 .ANG. thick, are formed by thermal oxidation (FIG. 3(a)). The oxide film 24 is necessary as a protection film in the case where an LDD side wall, etc. are formed in following processes.
As shown in FIG. 3(b), impurity ions are implanted in the direction of the arrows A, using a resist film 25 as a mask which is formed in the parts excluding a channel area 7. In this way, impurity ions are implanted in the channel area 7. When an N channel MOS type transistor is made to a depression type transistor, phosphor ions (P.sup.+), etc. are implanted at an accelerating voltage of 320 kV, and when it is made to an enhancement type transistor, boron ions (B.sup.+), etc. are implanted at an accelerating voltage of 160 kV.
After that, etching is performed with the use of an ammonium fluoride (NH.sub.4 F) solution. The purpose of the etching is to form a ROM data confirmation pattern in the area 15 shown in FIG. 2. On the surface of the area 15 a field oxide film 29 is formed as shown in FIG. 3(c-2), and etching is performed using a resist film 25 as a mask to form a pattern with a level difference. At the same time, etching is performed in the memory cell array area 12 (FIG. 2) to remove the surface of the oxide film 24 by the thickness of about 500 .ANG. (FIG. 3(c-1)).
Next, impurity ions are implanted to form diffusion areas 31 and 32 of a source drain, and an oxide film 33 is formed on their surfaces (FIG. 3(d)). As shown in FIG. 3(c-1), an oxide film 22 in the edge portion of a gate electrode 23 is removed by etching, so that the oxide film 33 is formed.
Recently, a gate electrode is sometimes formed with a silicide of a high melting point metal such as a molybdenum (Mo) or tungsten (W), or formed in a polycide structure. This is for the purpose of lowering the resistance of the gate electrode 23 for operation at higher speeds.
When a high melting point metal is used for the gate electrode 23, after the forming of the oxide film 24 it is etched with ammonium fluoride solution, and further when after-oxidation is performed for forming the oxide film 33, the gate electrode swells to an abnormal shape like the gate electrode 34 shown in FIG. 3(e). The phenomenon is considered to be caused by the fact that the grain interfaces of the silicide are exposed by the etching of ammonium fluoride after oxidation, and not only the oxidation of the surplus silicon, but the oxidation of the high melting point metal itself is caused by after-oxidation. Because of this, when a high melting point metal is used, it has been impossible to form a ROM data confirmation pattern. There has been another problem that when the etching with ammonium fluoride is performed, not only the field oxide film 29 in the area 15 where ROM data are to be written, but the field oxide film in the memory cell array area 12 is also shaved off and a level difference is formed.